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1 ? fn2992.8 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2000 2004, 2005. all rights reserved all other trademarks mentioned are the property of their respective owners. hfa1112 850mhz, low distortion programmable gain buffer amplifiers the hfa1112 is a closed loop buffer featuring user programmable gain and ultra high speed performance. manufactured on intersil?s proprietary complementary bipolar uhf-1 process, these devices offer a wide -3db bandwidth of 850mhz, very fast slew rate, excellent gain flatness, low distortion and high output current. a unique feature of the pinout allows the user to select a voltage gain of +1, -1, or +2, without the use of any external components. gain selection is accomplished via connections to the inputs, as described in the ?application information? section. the result is a more flexible product, fewer part types in inventory, and more efficient use of board space. compatibility with existing op amp pinouts provides flexibility to upgrade low gain amplifiers, while decreasing component count. unlike most buffers, the standard pinout provides an upgrade path should a higher closed loop gain be needed at a future date. this amplifier is available with programmable output limiting as the hfa1113. for applicati ons requiring a standard buffer pinout, please refer to the hfa1110 data sheet. hfa1112 (pdip, soic) top view features user programmable for closed-loop gains of +1, -1 or +2 without use of external resistors wide -3db bandwidth. . . . . . . . . . . . . . . . . . . . . . 850mhz very fast slew rate . . . . . . . . . . . . . . . . . . . . . . 2400v/ s fast settling time (0.1%). . . . . . . . . . . . . . . . . . . . . 11ns high output current . . . . . . . . . . . . . . . . . . . . . . . . . 60ma excellent gain accuracy . . . . . . . . . . . . . . . . . . . 0.99v/v overdrive recovery . . . . . . . . . . . . . . . . . . . . . . . . <10ns standard operational amplifier pinout pb-free plus anneal available (rohs compliant) applications rf/if processors driving flash a/d converters high-speed communications impedance transformation line driving video switching and routing radar systems medical imaging systems related literature - an9507, video cable drivers save board space related literature technical brief tb363 ?guidelines for handling and processing moisture sensitive surface mount devices (smds)? pin descriptions name pin number description nc 1, 5, 8 no connection -in 2 inverting input +in 3 non-inverting input v- 4 negative supply out 6 output v+ 7 positive supply nc -in +in v- 1 2 3 4 8 7 6 5 nc v+ out nc + 300 300 - ordering information part number (brand) temp. range (c) package pkg. dwg. # hfa1112ip -40 to 85 8 ld pdip e8.3 hfa1112ib (1112ib) -40 to 85 8 ld soic m8.15 hfa1112ib96 (1112ib) 8 ld soic tape and reel m8.15 hfa1112ibz (1112ibz) (note) -40 to 85 8 ld soic (pb-free) m8.15 hfa1112ibz96 (1112ibz) (note) 8 ld soic tape and reel (pb-free) m8.15 hfa11xxeval high speed op amp dip evaluation board note: intersil pb-free plus anneal products employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. data sheet july 27, 2005
2 absolute maximum ratings thermal information voltage between v+ and v- . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12v input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v supply output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60ma operating conditions temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . -40 o c to 85 o c thermal resistance (typical, note 1) ja ( o c/w) jc ( o c/w) pdip package . . . . . . . . . . . . . . . . . . . 125 n/a soic package . . . . . . . . . . . . . . . . . . . 170 n/a maximum junction temperature (plastic package) . . . . . . . .150 o c maximum storage temperature range . . . . . . . . . . -65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300 o c (soic - lead tips only) caution: stresses above those listed in ?a bsolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. note: 1. ja is measured with the component mounted on a low effective therma l conductivity test board in free air. see tech brief tb379 fo r details. electrical specifications v supply = 5v, a v = +1, r l = 100 ? , unless otherwise specified parameter test conditions temp ( o c) min typ max units input characteristics output offset voltage 25 - 8 25 mv full - - 35 mv output offset voltage drift full - 10 - v/ o c psrr 25 39 45 - db full 35 - - db input noise voltage (note 3) 100khz 25 - 9 - nv/ hz non-inverting input noise current (note 3) 100khz 25 - 37 - pa/ hz non-inverting input bias current 25 - 25 40 a full - - 65 a non-inverting input resistance 25 25 50 - k ? inverting input resistance (note 2) 25 240 300 360 ? input capacitance 25 - 2 - pf input common mode range full 2.5 2.8 - v transfer characteristics gain a v = +1, v in = +2v 25 0.980 0.990 1.02 v/v full 0.975 - 1.025 v/v gain a v = +2, v in = +1v 25 1.96 1.98 2.04 v/v full 1.95 - 2.05 v/v dc non-linearity (note 3) a v = +2, 2v full scale 25 - 0.02 - % output characteristics output voltage (note 3) a v = -1 25 3.0 3.3 - v full 2.5 3.0 - v output current (note 3) r l = 50 ? 25, 85 50 60 - ma -40 35 50 - ma closed loop output impedance dc, a v = +2 25 - 0.3 - ? power supply characteristics supply voltage range full 4.5 - 5.5 v supply current (note 3) 25 - 21 26 ma full - - 33 ma ac characteristics -3db bandwidth (v out = 0.2v p-p , notes 2, 3) a v = -1 25 450 800 - mhz a v = +1 25 500 850 - mhz a v = +2 25 350 550 - mhz hfa1112
3 slew rate (v out = 5v p-p , note 2) a v = -1 25 1500 2400 - v/ s a v = +1 25 800 1500 - v/ s a v = +2 25 1100 1900 - v/ s full power bandwidth (v out = 5v p-p , note 3) a v = -1 25 - 300 - mhz a v = +1 25 - 150 - mhz a v = +2 25 - 220 - mhz gain flatness (to 30mhz, notes 2, 3) a v = -1 25 - 0.02 - db a v = +1 25 - 0.1 - db a v = +2 25 - 0.015 0.04 db gain flatness (to 50mhz, notes 2, 3) a v = -1 25 - 0.05 - db a v = +1 25 - 0.2 - db a v = +2 25 - 0.036 0.08 db gain flatness (to 100mhz, notes 2, 3) a v = -1 25 - 0.10 - db a v = +2 25 - 0.07 0.22 db linear phase deviation (to 100mhz, note 3) a v = -1 25 - 0.13 - degrees a v = +1 25 - 0.83 - degrees a v = +2 25 - 0.05 - degrees 2nd harmonic distortion (30mhz, v out = 2v p-p , notes 2, 3) a v = -1 25 - -52 - dbc a v = +1 25 - -57 - dbc a v = +2 25 - -52 -45 dbc 3rd harmonic distortion (30mhz, v out = 2v p-p , notes 2, 3) a v = -1 25 - -71 - dbc a v = +1 25 - -73 - dbc a v = +2 25 - -72 -65 dbc 2nd harmonic distortion (50mhz, v out = 2v p-p , notes 2, 3) a v = -1 25 - -47 - dbc a v = +1 25 - -53 - dbc a v = +2 25 - -47 -40 dbc 3rd harmonic distortion (50mhz, v out = 2v p-p , notes 2, 3) a v = -1 25 - -63 - dbc a v = +1 25 - -68 - dbc a v = +2 25 - -65 -55 dbc 2nd harmonic distortion (100mhz, v out = 2v p-p , notes 2, 3) a v = -1 25 - -41 - dbc a v = +1 25 - -50 - dbc a v = +2 25 - -42 -35 dbc 3rd harmonic distortion (100mhz, v out = 2v p-p , notes 2, 3) a v = -1 25 - -55 - dbc a v = +1 25 - -49 - dbc a v = +2 25 - -62 -45 dbc 3rd order intercept (a v = +2, note 3) 100mhz 25 - 28 - dbm 300mhz 25 - 13 - dbm 1db compression (a v = +2, note 3) 100mhz 25 - 19 - dbm 300mhz 25 - 12 - dbm reverse isolation (s 12 , note 3) 40mhz 25 - -70 - db 100mhz 25 - -60 - db 600mhz 25 - -32 - db transient characteristics rise time (v out = 0.5v step, note 2) a v = -1 25 - 500 800 ps a v = +1 25 - 480 750 ps a v = +2 25 - 700 1000 ps electrical specifications v supply = 5v, a v = +1, r l = 100 ? , unless otherwise specified (continued) parameter test conditions temp ( o c) min typ max units hfa1112
4 application information closed loop gain selection the hfa1112 features a novel design which allows the user to select from three closed loop gains, without any external components. the result is a more flexible product, fewer part types in inventory, and more efficient use of board space. this ?buffer? operates in closed loop gains of -1, +1, or +2, and gain selection is accomplished via connections to the inputs. applying the input signal to +in and floating -in selects a gain of +1, while grounding -in selects a gain of +2. a gain of -1 is obtained by applying the input signal to -in with +in grounded. the table below summarizes these connections: pc board layout the frequency response of this amplifier depends greatly on the amount of care taken in designing the pc board. the use of low inductance comp onents such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! attention should be given to decoupling the power supplies. a large value (10 f) tantalum in parallel with a small value (0.1 f) chip capacitor works well in most cases. terminated microstrip signal lines are recommended at the input and output of the device. capacitance directly on the output must be minimized, or isolated as discussed in the next section. for unity gain applications, care must also be taken to minimize the capacitance to gr ound seen by the amplifier?s inverting input. at higher frequencies this capacitance will tend to short the -input to gnd, resulting in a closed loop gain which increases with frequency. this will cause excessive high frequency peaking and potentially other problems as well. an example of a good high frequency layout is the evaluation board shown in figure 2. driving capacitive loads capacitive loads, such as an a/d input, or an improperly terminated transmission line will degrade the amplifier?s phase margin resulting in frequency response peaking and possible oscillations. in most cases, the oscillation can be avoided by placing a resistor (r s ) in series with the output prior to the capacitance. figure 1 details starting points for the selection of this resistor. the points on the curve indicate the r s and c l combinations for the optimum bandwidth, stability, and settling time, but experimental fine tuning is recommended. picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. r s and c l form a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth of 850mhz. by decreasing r s as c l increases rise time (v out = 2v step) a v = -1 25 - 0.82 - ns a v = +1 25 - 1.06 - ns a v = +2 25 - 1.00 - ns overshoot (v out = 0.5v step, input t r /t f = 200ps, notes 2, 3, 4) a v = -1 25 - 12 30 % a v = +1 25 - 45 65 % a v = +2 25 - 6 20 % 0.1% settling time (note 3) v out = 2v to 0v 25 - 11 - ns 0.05% settling time v out = 2v to 0v 25 - 15 - ns overdrive recovery time v in = 5v p-p 25 - 8.5 - ns differential gain a v = +1, 3.58mhz, r l = 150 ? 25 - 0.03 - % a v = +2, 3.58mhz, r l = 150 ? 25 - 0.02 - % differential phase a v = +1, 3.58mhz, r l = 150 ? 25 - 0.05 - degrees a v = +2, 3.58mhz, r l = 150 ? 25 - 0.04 - degrees notes: 2. this parameter is not tested. the li mits are guaranteed based on lab characteriza tion, and reflect lot-to-lot variation. 3. see typical performance curves for more information. 4. overshoot decreases as input transit ion times increase, especially for a v = +1. please refer to typical performance curves. electrical specifications v supply = 5v, a v = +1, r l = 100 ? , unless otherwise specified (continued) parameter test conditions temp ( o c) min typ max units gain (a cl ) connections +input (pin 3) -input (pin 2) -1 gnd input +1 input nc (floating) +2 input gnd hfa1112
5 (as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. even so, bandwidth does decrease as you move to the right along the curve. for example, at a v = +1, r s = 50 ? , c l = 30pf, the overall bandwidth is limited to 300mhz, and bandwidth drops to 100mhz at a v = +1, r s = 5 ? , c l = 340pf. evaluation board the performance of the hfa1112 may be evaluated using the hfa11xx evaluation board, slightly modified as follows: 1. remove the 500 ? feedback resistor (r 2 ), and leave the connection open. 2. a. for a v = +1 evaluation, remove the 500 ? gain setting resistor (r 1 ), and leave pin 2 floating. b. for a v = +2, replace the 500 ? gain setting resistor with a 0 ? resistor to gnd. the layout and modified schematic of the board are shown in figure 2. to order evaluation boards (p art number hfa11xxeval), please contact your local sales office. r s ( ? ) load capacitance (pf) 50 45 40 35 30 25 20 15 10 5 0 0 40 80 120 160 200 240 280 320 360 400 a v = +1 a v = +2 figure 1. recommended series output resistor vs load capacitance 1 2 3 4 8 7 6 5 +5v 10 f 0.1 f v h 50 ? gnd gnd r 1 -5v 0.1 f 10 f 50 ? in out v l (a v = +1) or 0 ? (a v = +2) v h +in v l v+ gnd 1 v- out top layout bottom layout figure 2. evaluation board schematic and layout hfa1112
6 typical performance curves v supply = 5v, t a = 25 o c, r l = 100 ? , unless otherwise specified figure 3. small signal pulse response f igure 4. large signal pulse response figure 5. small signal pulse response f igure 6. large signal pulse response figure 7. small signal pulse response f igure 8. large signal pulse response a v = +2 200 150 100 50 0 -50 -100 -150 -200 output voltage (mv) time (5ns/div.) a v = +2 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 output voltage (v) time (5ns/div.) a v = +1 200 150 100 50 0 -50 -100 -150 -200 output voltage (mv) time (5ns/div.) a v = +1 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 output voltage (v) time (5ns/div.) a v = -1 200 150 100 50 0 -50 -100 -150 -200 output voltage (mv) time (5ns/div.) a v = -1 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 output voltage (v) time (5ns/div.) hfa1112
7 figure 9. frequency response figure 10. frequency response for various load resistors figure 11. frequency response for various load resistors figure 12. frequency response for various load resistors figure 13. frequency response for various output voltages figure 14. frequency response for various output voltages typical performance curves v supply = 5v, t a = 25 o c, r l = 100 ? , unless otherwise specified (continued) normalized gain (db) 6 3 0 -3 -6 -9 0.3 1 10 100 1000 normalized phase (degrees) frequency (mhz) v out = 200mv p-p a v = +2 0 -90 -180 -270 -360 gain phase a v = +1 a v = +2 a v = -1 a v = +1 a v = -1 gain (db) 0.3 1 10 100 1000 phase (degrees) frequency (mhz) 9 6 3 0 0 -90 -180 -270 -360 r l = 1k ? r l = 100 ? r l = 100 ? r l = 1k ? r l = 50 ? r l = 50 ? gain phase a v = +2, v out = 200mv p-p gain (db) 0.3 1 10 100 1000 0 -90 -180 -270 -360 phase (degrees) frequency (mhz) a v = +1, v out = 200mv p-p r l = 1k ? r l = 50 ? r l = 100 ? r l = 100 ? r l = 50 ? r l = 1k ? 6 3 0 -3 -6 -9 gain phase gain (db) 180 90 0 -90 -180 phase (degrees) 6 3 0 -3 -6 -9 a v = -1, v out = 200mv p-p r l = 1k ? r l = 100 ? r l = 100 ? r l = 50 ? r l = 1k ? 0.3 1 10 100 1000 frequency (mhz) gain phase r l = 50 ? gain (db) 12 9 6 3 0 0 -90 -180 -270 -360 phase (degrees) a v = +2 4.0v p-p 2.5v p-p 1v p-p 1v p-p 4.0v p-p 2.5v p-p gain phase 0.3 1 10 100 1000 frequency (mhz) gain (db) 0 -90 -180 -270 -360 phase (degrees) 6 3 0 -3 -6 v out = 1v p-p v out = 2.5v p-p v out = 4v p-p v out = 1v p-p v out = 2.5v p-p v out = 4v p-p a v = +1 gain phase 0.3 1 10 100 1000 frequency (mhz) hfa1112
8 figure 15. frequency response for various output voltages figure 16. full power bandwidth figure 17. -3db bandwidth vs temperature figure 18. gain flatness figure 19. deviation from linear phase figure 20. settling response typical performance curves v supply = 5v, t a = 25 o c, r l = 100 ? , unless otherwise specified (continued) gain (db) 180 90 0 -90 -180 phase (degrees) 6 3 0 -3 -6 a v = -1 gain phase 0.3 1 10 100 1000 frequency (mhz) v out = 1v p-p v out = 2.5v p-p v out = 4v p-p v out = 1v p-p v out = 2.5v p-p v out = 4v p-p normalized gain (db) 15 12 9 6 3 0 -3 -6 -9 -12 -15 0.3 1 10 100 1000 frequency (mhz) v out = 5v p-p a v = +2 a v = -1 a v = +1 bandwidth (mhz) 900 850 800 750 700 650 600 550 500 -50 -25 0 25 50 75 100 125 temperature ( o c) a v = -1 a v = +1 a v = +2 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 -0.05 -0.10 -0.15 1 10 100 frequency (mhz) normalized gain (db) a v = -1 a v = +1 a v = +2 4 3 2 1 0 -1 -2 -3 -4 -5 -6 0 15 30 45 60 75 90 105 120 135 frequency (mhz) deviation (degrees) a v = -1 a v = +1 150 a v = +2 settling error (%) 0.6 0.4 0.2 0.1 0 -0.1 -0.2 -0.4 -0.6 -2 3 8 13 18 23 28 33 38 43 48 time (ns) a v = +2, v out = 2v hfa1112
9 figure 21. low frequency reverse isolation (s 12 ) figure 22. high frequency reverse isolation (s 12 ) figure 23. 1db gain compression vs frequency figu re 24. 3rd order intermodulation intercept vs frequency figure 25. 2nd harmonic distortion vs p out figure 26. 3rd harmonic distortion vs p out typical performance curves v supply = 5v, t a = 25 o c, r l = 100 ? , unless otherwise specified (continued) -24 -30 -36 -42 -48 -54 -60 -66 -72 -78 -84 gain (db) 20 40 60 80 100 120 140 160 180 200 frequency (mhz) a v = +1 a v = -1 a v = +2 a v = +2 a v = -1 0 gain (db) -24 -30 -36 -42 -48 -54 -60 100 190 280 370 460 550 640 730 820 910 1000 frequency (mhz) phase (degrees) 235 180 90 45 0 gain phase a v = +1 a v = +2 a v = +2 a v = +1 a v = -1 a v = -1 output power at 1db compression (dbm) 20 18 16 14 12 10 8 6 4 2 0 100 200 300 400 500 frequency (mhz) a v = +1 a v = -1 a v = +2 30 20 10 0 intercept point (dbm) 100 200 300 400 2 - tone frequency (mhz) av = -1 a v = +1 a v = +2 -20 -30 -40 -50 -60 -70 -80 -90 -100 -6 -3 0 3 6 9 12 15 output power (dbm) distortion (dbc) a v = +2 100mhz 50mhz 30mhz -20 -30 -40 -50 -60 -70 -80 -90 -100 distortion (dbc) -6 -3 0 3 6 9 12 15 18 output power (dbm) a v = +2 100mhz 50mhz 30mhz hfa1112
10 figure 27. 2nd harmonic distortion vs p out figure 28. 3rd harmonic distortion vs p out figure 29. 2nd harmonic distortion vs p out figure 30. 3rd harmonic distortion vs p out figure 31. integral linearity error figure 32. overshoot vs input rise time typical performance curves v supply = 5v, t a = 25 o c, r l = 100 ? , unless otherwise specified (continued) -20 -30 -6 -3 0 3 6 9 12 15 distortion (dbc) output power (dbm) -40 -50 -60 -70 -80 -90 -100 a v = +1 100mhz 50mhz 30mhz distortion (dbc) a v = +1 -20 -30 -6 -3 0 3 6 9 12 15 output power (dbm) -40 -50 -60 -70 -80 -90 -100 100mhz 50mhz 30mhz distortion (dbc) -20 -30 -6 -3 0 3 6 9 12 15 output power (dbm) -40 -50 -60 -70 -80 -90 -100 100mhz 50mhz 30mhz a v = -1 distortion (dbc) -20 -30 -6 -3 0 3 6 9 12 15 output power (dbm) -40 -50 -60 -70 -80 -90 -100 100mhz 50mhz 30mhz a v = -1 -3.0 input voltage (v) -2.0 -1.0 0 1.0 2.0 3.0 -0.04 -0.02 0 0.02 0.04 percent error (%) 100 300 500 700 900 1100 1300 overshoot (%) input rise time (ps) 60 50 40 30 20 10 0 v out = 0.5v a v = +1 a v = -1 a v = +2 hfa1112
11 figure 33. overshoot vs input rise time figure 34. overshoot vs input rise time figure 35. supply current vs supply voltage figure 36. supply current vs temperature figure 37. output voltage vs temperat ure figure 38. input noise characteristics typical performance curves v supply = 5v, t a = 25 o c, r l = 100 ? , unless otherwise specified (continued) 100 300 500 700 900 1100 1300 overshoot (%) input rise time (ps) 60 50 40 30 20 10 0 v out = 1v a v = +1 a v = -1 a v = +2 60 50 40 30 20 10 0 100 300 500 700 900 1100 1300 overshoot (%) input rise time (ps) v out = 2v a v = +1 a v = -1 a v = +2 total supply voltage (v+ - v-, v) 22 17 15 13 11 supply current (ma) 59 9 7 5 678 10 21 20 19 6 8 10 12 14 16 18 25 24 23 22 21 20 19 18 17 16 15 -50 -25 0 25 50 75 100 125 temperature ( o c) supply current (ma) 3.6 3.5 3.4 3.3 3.2 3.1 2.9 2.8 2.7 2.6 -50 -25 0 25 50 75 100 125 temperature ( o c) output voltage (v) a v = -1 +v out (r l = 50 ?) |-v out | (r l = 100 ?) |-v out | (r l = 50 ?) 3.0 +v out (r l = 100 ?) 50 40 30 20 10 130 110 90 70 50 30 0.1 1 10 100 frequency (khz) noise voltage (nv/ hz ) 0 noise current (pa/ hz ) e ni i ni hfa1112
12 die characteristics die dimensions 63 mils x 44 mils x 19 mils 1600 m x 1130 m 483 m metallization type: metal 1: alcu (2%)/tiw thickness: metal 1: 8k ? 0.4k ? type: metal 2: alcu (2%) thickness: metal 2: 16k ? 0.8k ? passivation ty p e : n i t r i d e thickness: 4k ? 0.5k ? transistor count 52 substrate potential (powered up) floating (recommend connection to v-) metallization mask layouts hfa1112 nc v- nc nc out +in -in nc v+ hfa1112
13 hfa1112 dual-in-line plastic packages (pdip) c l e e a c e b e c -b- e1 index 12 3 n/2 n area seating base plane plane -c- d1 b1 b e d d1 a a2 l a 1 -a- 0.010 (0.25) c a m bs notes: 1. controlling dimensions: inch. in case of conflict between english and metric dimensions, the inch dimensions control. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. symbols are defined in the ?mo se ries symbol list? in section 2.2 of publication no. 95. 4. dimensions a, a1 and l are m easured with the package seated in jedec seating plane gauge gs - 3. 5. d, d1, and e1 dimensions do no t include mold flash or protru- sions. mold flash or protrusi ons shall not exceed 0.010 inch (0.25mm). 6. e and are measured with the leads constrained to be per- pendicular to datum . 7. e b and e c are measured at the lead tips with the leads uncon- strained. e c must be zero or greater. 8. b1 maximum dimensions do not include dambar protrusions. dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. n is the maximum number of terminal positions. 10. corner leads (1, n, n/2 and n/2 + 1) for e8.3, e16.3, e18.3, e28.3, e42.6 will have a b1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). e a -c- e8.3 (jedec ms-001-ba issue d) 8 lead dual-in-line plastic package symbol inches millimeters notes min max min max a - 0.210 - 5.33 4 a1 0.015 - 0.39 - 4 a2 0.115 0.195 2.93 4.95 - b 0.014 0.022 0.356 0.558 - b1 0.045 0.070 1.15 1.77 8, 10 c 0.008 0.014 0.204 0.355 - d 0.355 0.400 9.01 10.16 5 d1 0.005 - 0.13 - 5 e 0.300 0.325 7.62 8.25 6 e1 0.240 0.280 6.10 7.11 5 e 0.100 bsc 2.54 bsc - e a 0.300 bsc 7.62 bsc 6 e b - 0.430 - 10.92 7 l 0.115 0.150 2.93 3.81 4 n8 89 rev. 0 12/93
14 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com hfa1112 small outline plast ic packages (soic) index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 c h 0.25(0.010) b m m notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include in terlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. m8.15 (jedec ms-012-aa issue c) 8 lead narrow body small outline plastic package symbol inches millimeters notes min max min max a 0.0532 0.0688 1.35 1.75 - a1 0.0040 0.0098 0.10 0.25 - b 0.013 0.020 0.33 0.51 9 c 0.0075 0.0098 0.19 0.25 - d 0.1890 0.1968 4.80 5.00 3 e 0.1497 0.1574 3.80 4.00 4 e 0.050 bsc 1.27 bsc - h 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 l 0.016 0.050 0.40 1.27 6 n8 87 0 8 0 8 - rev. 1 6/05

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